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hogandergregkh
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drm/i915/psr: Compute PSR entry_setup_frames into intel_crtc_state
commit 7caac65 upstream. PSR entry_setup_frames is currently computed directly into struct intel_dp:intel_psr:entry_setup_frames. This causes a problem if mode change gets rejected after PSR compute config: Psr_entry_setup_frames computed for this rejected state is in intel_dp:intel_psr:entry_setup_frame. Fix this by computing it into intel_crtc_state and copy the value into intel_dp:intel_psr:entry_setup_frames on PSR enable. Fixes: 2b981d5 ("drm/i915/display: Support PSR entry VSC packet to be transmitted one frame earlier") Cc: Mika Kahola <mika.kahola@intel.com> Cc: <stable@vger.kernel.org> # v6.8+ Signed-off-by: Jouni Högander <jouni.hogander@intel.com> Reviewed-by: Suraj Kandpal <suraj.kandpal@intel.com> Link: https://patch.msgid.link/20260312083710.1593781-3-jouni.hogander@intel.com (cherry picked from commit 8c229b4) Signed-off-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com> [ dropped intel_psr_needs_wa_18037818876 hunk and adjusted surrounding context ] Signed-off-by: Sasha Levin <sashal@kernel.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
1 parent 8b32678 commit 3ccfbd4

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Lines changed: 3 additions & 1 deletion

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drivers/gpu/drm/i915/display/intel_display_types.h

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@@ -1218,6 +1218,7 @@ struct intel_crtc_state {
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bool wm_level_disabled;
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u32 dc3co_exitline;
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u16 su_y_granularity;
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u8 entry_setup_frames;
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/*
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* Frequence the dpll for the port should run at. Differs from the

drivers/gpu/drm/i915/display/intel_psr.c

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@@ -1571,7 +1571,7 @@ static bool _psr_compute_config(struct intel_dp *intel_dp,
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entry_setup_frames = intel_psr_entry_setup_frames(intel_dp, adjusted_mode);
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if (entry_setup_frames >= 0) {
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intel_dp->psr.entry_setup_frames = entry_setup_frames;
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crtc_state->entry_setup_frames = entry_setup_frames;
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} else {
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drm_dbg_kms(display->drm,
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"PSR condition failed: PSR setup timing not met\n");
@@ -1979,6 +1979,7 @@ static void intel_psr_enable_locked(struct intel_dp *intel_dp,
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intel_dp->psr.psr2_sel_fetch_cff_enabled = false;
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intel_dp->psr.req_psr2_sdp_prior_scanline =
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crtc_state->req_psr2_sdp_prior_scanline;
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intel_dp->psr.entry_setup_frames = crtc_state->entry_setup_frames;
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if (!psr_interrupt_error_check(intel_dp))
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return;

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