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spi: tegra210-quad: Return IRQ_HANDLED when timeout already processed transfer
[ Upstream commit aabd8ea ] When the ISR thread wakes up late and finds that the timeout handler has already processed the transfer (curr_xfer is NULL), return IRQ_HANDLED instead of IRQ_NONE. Use a similar approach to tegra_qspi_handle_timeout() by reading QSPI_TRANS_STATUS and checking the QSPI_RDY bit to determine if the hardware actually completed the transfer. If QSPI_RDY is set, the interrupt was legitimate and triggered by real hardware activity. The fact that the timeout path handled it first doesn't make it spurious. Returning IRQ_NONE incorrectly suggests the interrupt wasn't for this device, which can cause issues with shared interrupt lines and interrupt accounting. Fixes: b4e002d ("spi: tegra210-quad: Fix timeout handling") Signed-off-by: Breno Leitao <leitao@debian.org> Signed-off-by: Usama Arif <usamaarif642@gmail.com> Tested-by: Jon Hunter <jonathanh@nvidia.com> Acked-by: Jon Hunter <jonathanh@nvidia.com> Acked-by: Thierry Reding <treding@nvidia.com> Link: https://patch.msgid.link/20260126-tegra_xfer-v2-1-6d2115e4f387@debian.org Signed-off-by: Mark Brown <broonie@kernel.org> Signed-off-by: Sasha Levin <sashal@kernel.org>
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Lines changed: 17 additions & 2 deletions

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drivers/spi/spi-tegra210-quad.c

Lines changed: 17 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -1444,15 +1444,30 @@ static irqreturn_t handle_dma_based_xfer(struct tegra_qspi *tqspi)
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static irqreturn_t tegra_qspi_isr_thread(int irq, void *context_data)
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{
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struct tegra_qspi *tqspi = context_data;
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u32 status;
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/*
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* Read transfer status to check if interrupt was triggered by transfer
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* completion
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*/
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status = tegra_qspi_readl(tqspi, QSPI_TRANS_STATUS);
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/*
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* Occasionally the IRQ thread takes a long time to wake up (usually
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* when the CPU that it's running on is excessively busy) and we have
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* already reached the timeout before and cleaned up the timed out
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* transfer. Avoid any processing in that case and bail out early.
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*
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* If no transfer is in progress, check if this was a real interrupt
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* that the timeout handler already processed, or a spurious one.
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*/
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if (!tqspi->curr_xfer)
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return IRQ_NONE;
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if (!tqspi->curr_xfer) {
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/* Spurious interrupt - transfer not ready */
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if (!(status & QSPI_RDY))
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return IRQ_NONE;
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/* Real interrupt, already handled by timeout path */
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return IRQ_HANDLED;
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}
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tqspi->status_reg = tegra_qspi_readl(tqspi, QSPI_FIFO_STATUS);
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