diff --git a/ruy/cpuinfo.cc b/ruy/cpuinfo.cc
index 5daee0b7f1..ccad777bea 100644
--- a/ruy/cpuinfo.cc
+++ b/ruy/cpuinfo.cc
@@ -48,6 +48,9 @@ bool QueryCacheParams(CpuCacheParams* cache_params) {
     int local_cache_size = 0;
     int last_level_cache_size = 0;
     const cpuinfo_processor* processor = cpuinfo_get_processor(i);
+    if (!processor) {
+      continue;
+    }
     // Loop over cache levels. Ignoring L4 for now: it seems that in CPUs that
     // have L4, we would still prefer to stay in lower-latency L3.
     for (const cpuinfo_cache* cache :