From 86956a23fd347a769e119d866cd63055093facf7 Mon Sep 17 00:00:00 2001 From: Andrew Jones Date: Fri, 21 Aug 2026 13:21:00 +0200 Subject: [PATCH 1/2] FROMLIST: iommu/riscv: Report cache coherency capability VFIO and iommufd require IOMMU_CAP_CACHE_COHERENCY because they use IOMMU_CACHE mappings and have no userspace cache-maintenance path. RISC-V page tables preserve physical memory attributes for IOMMU_CACHE mappings. Svpbmt marks mappings without IOMMU_CACHE as non-cacheable, but preserving physical attributes cannot make a noncoherent device path coherent. Report the capability only for devices marked DMA coherent. This limits userspace assignment to paths that can honor cacheable mappings. Signed-off-by: Andrew Jones Reviewed-by: Jason Gunthorpe Link: https://lore.kernel.org/r/20260821112100.572037-1-andrew.jones@oss.qualcomm.com Signed-off-by: Sun Yuechi --- drivers/iommu/riscv/iommu.c | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/drivers/iommu/riscv/iommu.c b/drivers/iommu/riscv/iommu.c index 2b3dc63536d5cf..2179c1c404a147 100644 --- a/drivers/iommu/riscv/iommu.c +++ b/drivers/iommu/riscv/iommu.c @@ -16,6 +16,7 @@ #include #include #include +#include #include #include #include @@ -1448,6 +1449,16 @@ static struct iommu_group *riscv_iommu_device_group(struct device *dev) return generic_device_group(dev); } +static bool riscv_iommu_capable(struct device *dev, enum iommu_cap cap) +{ + switch (cap) { + case IOMMU_CAP_CACHE_COHERENCY: + return dev_is_dma_coherent(dev); + default: + return false; + } +} + static int riscv_iommu_of_xlate(struct device *dev, const struct of_phandle_args *args) { return iommu_fwspec_add_ids(dev, args->args, 1); @@ -1509,6 +1520,7 @@ static void riscv_iommu_release_device(struct device *dev) static const struct iommu_ops riscv_iommu_ops = { .of_xlate = riscv_iommu_of_xlate, + .capable = riscv_iommu_capable, .identity_domain = &riscv_iommu_identity_domain, .blocked_domain = &riscv_iommu_blocking_domain, .release_domain = &riscv_iommu_blocking_domain, From e0bf290744a47dcf7232513aab6f65d4b8af1d25 Mon Sep 17 00:00:00 2001 From: Tomasz Jeznach Date: Mon, 31 Aug 2026 16:59:40 +0200 Subject: [PATCH 2/2] FROMLIST: vfio: enable IOMMU_TYPE1 for RISC-V Enable VFIO support on RISC-V architecture, now that the RISC-V IOMMU driver reports the IOMMU_CAP_CACHE_COHERENCY capability VFIO_TYPE1 and iommufd both require before allowing a device to be bound. Signed-off-by: Tomasz Jeznach Signed-off-by: Andrew Jones Reviewed-by: Nutty Liu Link: https://lore.kernel.org/r/20260831145943.313726-15-andrew.jones@oss.qualcomm.com Signed-off-by: Sun Yuechi --- drivers/vfio/Kconfig | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/vfio/Kconfig b/drivers/vfio/Kconfig index ceae52fd7586d0..ad62205b4e4541 100644 --- a/drivers/vfio/Kconfig +++ b/drivers/vfio/Kconfig @@ -39,7 +39,7 @@ config VFIO_GROUP config VFIO_CONTAINER bool "Support for the VFIO container /dev/vfio/vfio" - select VFIO_IOMMU_TYPE1 if MMU && (X86 || S390 || ARM || ARM64) + select VFIO_IOMMU_TYPE1 if MMU && (X86 || S390 || ARM || ARM64 || RISCV) depends on VFIO_GROUP default y help