🔰 Verilog for Beginners – Basic Digital Gates Simulation | Sly Fox Electronics

Welcome to the Verilog for Beginners project! This repository is part of a practical introduction to digital logic design using Verilog HDL and Xilinx Vivado.

📺 Watch the full tutorial on Sly Fox Electronics YouTube channel
⭐ Designed especially for beginners who are stepping into the world of FPGA programming and digital electronics.

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🧠 What You’ll Learn

• How to write Verilog code for basic digital logic gates:
  • AND
  • OR
  • NOT
  • NAND
  • NOR
  • XOR
• How to simulate Verilog modules using a testbench in Vivado.
• Understand the waveform output and verify gate logic behavior.

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🛠️ Project Details

• Language: Verilog HDL
• Software: Xilinx Vivado (Tested on Vivado 2020.2 and later)
• Level: Beginner
• Category: Digital Design, FPGA Simulation
• Simulation Tool: Vivado Simulator

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