Fix FDCAN interrupt configuration in CO_driver_STM32.c

[SWolfSchunk]

Fix assertion by using realistic values from stm32h5xx_hal_fdcan.h

[MaJerle]

Does this compile for all series or you just tested H5? If only H5, we must verify compilation is OK for the rest, too.

[SWolfSchunk]

I can only validate H5.
Maybe it is a better way to introduce some kind of CONFIG header (in examples / as template) and include it here.
This way it makes it nescessary to modify code / copy code when used as submodule.

[MaJerle]

I am almost 100% sure this won't compile for STM32G0, or older STM32s, so I prefer we don't merge this now.

My suggestion, if you agree, is that in the same file, we start the #if-else macro logic to set the flags.

#if defined(STM32H5xx)
#define MY_VAR ....
#else
/* Keep legacy for now */
#define MY_VAR 0xFFFFFFFF
#endif

[SWolfSchunk]

Yes I agree this would be a much better approach.

[TheCitrusMan]

I have a couple G0 based projects, I may be able to check this later today...

[SWolfSchunk]

I added the check based on STM32H5xx_HAL_CONF_H which is always defined by stm32h5xx_hal_conf.h.
Otherwise some -D define or header inclusion will be necessary.
I personally use -DSTM32H573xx that would be much to specific.

[TheCitrusMan]

The macros do exist in stm32g0xx_hal_fdcan.h which means it compiles correctly.

[MaJerle]

Yes, the G0 and H5 use the same FDCAN configuration, you are right. Same will be with C5, G4, C0 and at least U5.

Anyway, the 0xFFFFFFFF was used to simplify the usage. For example STM32H7 uses FDCAN with 32 buffers, therefore in this case we want to get interrupts for all of them. Same here.

The HAL driver will correctly select bits in the implementation.

Therefore, when I think, do we need to do any update?

[SWolfSchunk]

@MaJerle as @TheCitrusMan verified one of your doubts is clear.
The other doubt is older STM32s but I think all of the already used FDCAN Makros are not available on (e. g. STM32F4 ...).
So the question is which ones should be taken care of?

[SWolfSchunk]

@MaJerle
From stm32h5xx_hal_fdcan.c:

 HAL_StatusTypeDef HAL_FDCAN_ActivateNotification(FDCAN_HandleTypeDef *hfdcan, uint32_t ActiveITs,
                                                 uint32_t BufferIndexes)
{
  HAL_FDCAN_StateTypeDef state = hfdcan->State;
  uint32_t ITs_lines_selection;

  /* Check function parameters */
  assert_param(IS_FDCAN_IT(ActiveITs));
  if ((ActiveITs & (FDCAN_IT_TX_COMPLETE | FDCAN_IT_TX_ABORT_COMPLETE)) != 0U)
  {
    assert_param(IS_FDCAN_TX_LOCATION_LIST(BufferIndexes));
  }

From stm32h5xx_hal_fdcan.h:

#define IS_FDCAN_TX_LOCATION_LIST(LOCATION) (((LOCATION) >= FDCAN_TX_BUFFER0) && \
                                             ((LOCATION) <= (FDCAN_TX_BUFFER0 | FDCAN_TX_BUFFER1 | FDCAN_TX_BUFFER2)))

If assertion is active this is a problem as IS_FDCAN_TX_LOCATION_LIST wont return true in case of 0xFFFFFFFF

[TheCitrusMan]

Yes, the G0 and H5 use the same FDCAN configuration, you are right. Same will be with C5, G4, C0 and at least U5.

Anyway, the 0xFFFFFFFF was used to simplify the usage. For example STM32H7 uses FDCAN with 32 buffers, therefore in this case we want to get interrupts for all of them. Same here.

The HAL driver will correctly select bits in the implementation.

Therefore, when I think, do we need to do any update?

I have a G4 project also -> confirm that this is also fine.