feat[cartesian]: DaCe optimal for/map schedule

[FlorianDeconinck]

Description

Reworked the based scheduling of the loops in OIR -> TreeIR to simplify the code and introduce an optimal scheduling for parallelism:

• merge all map/for schedule code into a single _resolve_loop_schedule
• respect syntax for sequential loops
• default parallelism to maximize local parallelization (omp for parallel on CPU and plain kernel for CUDA)

This should be covered by the current unit tests

[romanc]

I think the failing gpu-tests are due to a cuda-codgen issue in DaCe. From what I understand, this test case triggers the codepath here which inserts a global grid sync into a merged kernel. The grid sync insertion in successful, but the __gbar symbol isn't defined because it's not passed to the arguments of the nested SDFG. Similar, the (recreated) conditions inserted after the grid sync might (and in this case do) use undefined symbols that would need to be passed as arguments of the nested SDFG function. Both doesn't happen and this is why nvcc fails.

We could work around by slightly changing the test scenario.