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fix(dts): align XiangShan ISA declarations with RVA23 profiles #53

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fix(dts): align XiangShan ISA declarations with RVA23 profiles #53

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ac3ed87
fix(dts): align isa extention with rva23
rezado Aug 26, 2026
42966c7
fix(dts): remove v for all novec and fix 16gb dts
rezado Aug 26, 2026
ee5aaed
fix(dts): add fixed rng seed to no-vector profiles
rezado Sep 2, 2026
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17 changes: 9 additions & 8 deletions dts/xiangshan-fpga-noAIA-2hart-mem16g-novec.dts.in
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -43,7 +43,7 @@
* workload template while using the FPGA board interrupt/peripheral
* map below.
*/
riscv,isa = "rv64imafdch_smstateen_sscofpmf_zicntr_zihpm_svpbmt_sdtrig_smcsrind_sscsrind_svade";
riscv,isa = "rv64imafdch_smstateen_sscofpmf_zaamo_zalrsc_zcd_zicbom_zicbop_zicboz_zicntr_zihpm_svpbmt_sdtrig_smcsrind_sscsrind_svade";
riscv,isa-base = "rv64i";
riscv,isa-extensions =
"i", "m", "a", "f", "d", "c", "h",
Expand All @@ -56,10 +56,10 @@
"sspm", "ssstateen", "ssstrict",
"sstvala", "sstvecd", "ssu64xl", "supm",
"sv39", "sv48", "svade", "svbare", "svinval",
"svnapot", "svpbmt", "za64rs", "zacas", "zawrs",
"svnapot", "svpbmt", "za64rs", "zaamo", "zalrsc", "zacas", "zawrs",
"zba", "zbb", "zbc", "zbkb", "zbkc", "zbkx",
"zbs", "zca", "zcb", "zcmop", "zfa", "zfh", "zfhmin",
"zic64b",
"zbs", "zca", "zcb", "zcd", "zcmop", "zfa", "zfh", "zfhmin",
"zic64b", "zicbom", "zicbop", "zicboz",
"ziccamoa", "ziccif", "zicclsm", "ziccrse",
"zicntr", "zicond", "zicsr", "zifencei",
"zihintntl", "zihintpause", "zihpm", "zimop",
Expand Down Expand Up @@ -103,7 +103,7 @@
* workload template while using the FPGA board interrupt/peripheral
* map below.
*/
riscv,isa = "rv64imafdch_smstateen_sscofpmf_zicntr_zihpm_svpbmt_sdtrig_smcsrind_sscsrind_svade";
riscv,isa = "rv64imafdch_smstateen_sscofpmf_zaamo_zalrsc_zcd_zicbom_zicbop_zicboz_zicntr_zihpm_svpbmt_sdtrig_smcsrind_sscsrind_svade";
riscv,isa-base = "rv64i";
riscv,isa-extensions =
"i", "m", "a", "f", "d", "c", "h",
Expand All @@ -116,10 +116,10 @@
"sspm", "ssstateen", "ssstrict",
"sstvala", "sstvecd", "ssu64xl", "supm",
"sv39", "sv48", "svade", "svbare", "svinval",
"svnapot", "svpbmt", "za64rs", "zacas", "zawrs",
"svnapot", "svpbmt", "za64rs", "zaamo", "zalrsc", "zacas", "zawrs",
"zba", "zbb", "zbc", "zbkb", "zbkc", "zbkx",
"zbs", "zca", "zcb", "zcmop", "zfa", "zfh", "zfhmin",
"zic64b",
"zbs", "zca", "zcb", "zcd", "zcmop", "zfa", "zfh", "zfhmin",
"zic64b", "zicbom", "zicbop", "zicboz",
"ziccamoa", "ziccif", "zicclsm", "ziccrse",
"zicntr", "zicond", "zicsr", "zifencei",
"zihintntl", "zihintpause", "zihpm", "zimop",
Expand Down Expand Up @@ -232,6 +232,7 @@
stdout-path = "serial0:115200n8";
linux,initrd-start = <INITRAMFS_BEGIN_HI INITRAMFS_BEGIN_LO>;
linux,initrd-end = <INITRAMFS_END_HI INITRAMFS_END_LO>;
rng-seed = /bits/ 8 <0x58 0x49 0x41 0x4e 0x47 0x53 0x48 0x41 0x4e 0x5f 0x4e 0x45 0x4d 0x55 0x5f 0x42 0x4f 0x41 0x52 0x44 0x5f 0x52 0x41 0x4e 0x44 0x4f 0x4d 0x5f 0x53 0x45 0x45 0x44>;

opensbi-config {
compatible = "opensbi,config";
Expand Down
17 changes: 9 additions & 8 deletions dts/xiangshan-fpga-noAIA-2hart-mem8g-novec.dts.in
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -43,7 +43,7 @@
* workload template while using the FPGA board interrupt/peripheral
* map below.
*/
riscv,isa = "rv64imafdch_smstateen_sscofpmf_zicntr_zihpm_svpbmt_sdtrig_smcsrind_sscsrind_svade";
riscv,isa = "rv64imafdch_smstateen_sscofpmf_zaamo_zalrsc_zcd_zicbom_zicbop_zicboz_zicntr_zihpm_svpbmt_sdtrig_smcsrind_sscsrind_svade";
riscv,isa-base = "rv64i";
riscv,isa-extensions =
"i", "m", "a", "f", "d", "c", "h",
Expand All @@ -56,10 +56,10 @@
"sspm", "ssstateen", "ssstrict",
"sstvala", "sstvecd", "ssu64xl", "supm",
"sv39", "sv48", "svade", "svbare", "svinval",
"svnapot", "svpbmt", "za64rs", "zacas", "zawrs",
"svnapot", "svpbmt", "za64rs", "zaamo", "zalrsc", "zacas", "zawrs",
"zba", "zbb", "zbc", "zbkb", "zbkc", "zbkx",
"zbs", "zca", "zcb", "zcmop", "zfa", "zfh", "zfhmin",
"zic64b",
"zbs", "zca", "zcb", "zcd", "zcmop", "zfa", "zfh", "zfhmin",
"zic64b", "zicbom", "zicbop", "zicboz",
"ziccamoa", "ziccif", "zicclsm", "ziccrse",
"zicntr", "zicond", "zicsr", "zifencei",
"zihintntl", "zihintpause", "zihpm", "zimop",
Expand Down Expand Up @@ -103,7 +103,7 @@
* workload template while using the FPGA board interrupt/peripheral
* map below.
*/
riscv,isa = "rv64imafdch_smstateen_sscofpmf_zicntr_zihpm_svpbmt_sdtrig_smcsrind_sscsrind_svade";
riscv,isa = "rv64imafdch_smstateen_sscofpmf_zaamo_zalrsc_zcd_zicbom_zicbop_zicboz_zicntr_zihpm_svpbmt_sdtrig_smcsrind_sscsrind_svade";
riscv,isa-base = "rv64i";
riscv,isa-extensions =
"i", "m", "a", "f", "d", "c", "h",
Expand All @@ -116,10 +116,10 @@
"sspm", "ssstateen", "ssstrict",
"sstvala", "sstvecd", "ssu64xl", "supm",
"sv39", "sv48", "svade", "svbare", "svinval",
"svnapot", "svpbmt", "za64rs", "zacas", "zawrs",
"svnapot", "svpbmt", "za64rs", "zaamo", "zalrsc", "zacas", "zawrs",
"zba", "zbb", "zbc", "zbkb", "zbkc", "zbkx",
"zbs", "zca", "zcb", "zcmop", "zfa", "zfh", "zfhmin",
"zic64b",
"zbs", "zca", "zcb", "zcd", "zcmop", "zfa", "zfh", "zfhmin",
"zic64b", "zicbom", "zicbop", "zicboz",
"ziccamoa", "ziccif", "zicclsm", "ziccrse",
"zicntr", "zicond", "zicsr", "zifencei",
"zihintntl", "zihintpause", "zihpm", "zimop",
Expand Down Expand Up @@ -233,6 +233,7 @@
stdout-path = "serial0:115200n8";
linux,initrd-start = <INITRAMFS_BEGIN_HI INITRAMFS_BEGIN_LO>;
linux,initrd-end = <INITRAMFS_END_HI INITRAMFS_END_LO>;
rng-seed = /bits/ 8 <0x58 0x49 0x41 0x4e 0x47 0x53 0x48 0x41 0x4e 0x5f 0x4e 0x45 0x4d 0x55 0x5f 0x42 0x4f 0x41 0x52 0x44 0x5f 0x52 0x41 0x4e 0x44 0x4f 0x4d 0x5f 0x53 0x45 0x45 0x44>;

opensbi-config {
compatible = "opensbi,config";
Expand Down
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