IOStandards

Anotações sobre padrões de portas no FPGA e relacionados.

IO Standards

BLVD

BLVDS

CMOS e LVCMOS

SSTL

TTL e LVTTL

HSTL

MIPI

LVDS

LVPECL

MINILVDS

MLVD

MLVDS

MLVDS

PPLVDS

RSDS

SSTL

Single Ended ou Diferencial

Banco

Hysteresis

Necessidade de Vref

Referências

• https://www.intel.com/content/www/us/en/programmable/quartushelp/17.0/reference/glossary/def_iostandard-1.htm
• https://documentation.euresys.com/Products/Coaxlink/Coaxlink_10_4/Content/03_Using_Coaxlink/application-notes/connecting-ttl-to-isolated-ports/TTL_and_LVTTL_levels.htm