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[WS2][GEMM][PR4]: add PR4 forward integration validation for Qwen3-8B (TP=2, CP=2) - #281

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Flink-ddd merged 1 commit into
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feat/239-ws2-qwen3-fwd-standalone
Aug 5, 2026
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[WS2][GEMM][PR4]: add PR4 forward integration validation for Qwen3-8B (TP=2, CP=2)#281
Flink-ddd merged 1 commit into
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feat/239-ws2-qwen3-fwd-standalone

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Description

This PR introduces the WS2 PR4 forward integration validation test for Qwen3-8B, verifying the execution of the SwiGLUSM90Op within a distributed topology.

Note: This PR depends on the underlying SM90 operator introduced in PR #258. CI will pass once that PR is merged.

The test implements a strict 4-rank topology to validate the following requirements:

Creates TP groups [0, 1], [2, 3] and CP groups [0, 2], [1, 3] in the test launcher.

Runs Gate and Up local det_gemm_fwd independently on both CP shards.

Executes the PR3 Down forward operator on both TP groups.

Explicitly marks InterNode TP, TP=4+, and uneven shards as NOT COVERED.

Hardware Validation

The validation script was successfully executed on a bare-metal node equipped with 8x NVIDIA H200 SXM GPUs.

Below is the execution log confirming the topological setup, successful pipeline assembly, and adherence to the defined accuracy thresholds (atol/rtol) without numerical drift.

INFO 08-05 15:25:23 [RL-Kernel]: Successfully linked to the SM90 SwiGLU forward kernel.

=== Starting WS2 PR4 Forward Validation ===
INFO 08-05 15:25:24 [RL-Kernel]: Successfully linked to the SM90 SwiGLU forward kernel.
INFO 08-05 15:25:24 [RL-Kernel]: Successfully linked to the SM90 SwiGLU forward kernel.
INFO 08-05 15:25:24 [RL-Kernel]: Successfully linked to the SM90 SwiGLU forward kernel.
[Rank 0] Pipeline Assembled & Validated. Output Shape: torch.Size([128, 4096])
[Rank 0] Validation Passed! (atol=0.05, rtol=0.02)

=== WS2 Topology & Conformance Report ===
COVERED:
  - 4 ranks topology (TP=2, CP=2)
  - two IntraNode TP AllReduce groups
  - NCCL Version: (2, 29, 7)
  - Dtype: torch.bfloat16 arithmetic and reductions
NOT COVERED:
  - InterNode TP, TP=4+, and uneven shards
  - DP>1 or a combined DP x CP gradient group
=========================================

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Flink-ddd merged commit 2e08ef6 into main Aug 5, 2026
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