Skip to content
View SARdude54's full-sized avatar

Block or report SARdude54

Block user

Prevent this user from interacting with your repositories and sending you notifications. Learn more about blocking users.

You must be logged in to block users.

Content in all repositories owned by your account will be closed.
Maximum 250 characters. Please don’t include any personal information such as legal names or email addresses. Markdown is supported. This note will only be visible to you.
Report abuse

Contact GitHub support about this user’s behavior. Learn more about reporting abuse.

Report abuse
SARdude54/README.md

Hi My name is Saul Rodriguez

I am a Computer Engineering student at Cal Poly San Luis Obispo and I am passionate about digital design, computer architecture, ASIC development, FPGA embedded projects, and compiler construction. I am specifically interested in hardware accelerators for AI and graphics. I love exploring new architectures and development RTL for open-source projects. I am actively looking for ways to grow and solidify my hardware skills and collaborate with others.

  • 🌍 I'm based in San Luis Obispo, Ca and Los Angeles, Ca
  • ✉️ You can contact me at saulargz35@gmail.com
  • 👥 I'm looking to collaborate on any open-source RTL projects or embedded systems projects to learn new skills.
  • 🧠 I'm currently working on many hardware and system-level projects:
    • Check out on my senior project at Cal Poly: Vortex ASIC
    • Currently working on a RISC-V SoC on the DE10-Lite FPGA
      • Exploring bus architectures, such as Avalon-MM, to connect MMIO peripherals.
      • Exploring UVM and SVA to verify the hardware.
      • Writing RISC-V firmware and boot code.

riscv stmicroelectronics ubuntu

Socials

GitHub LinkedIn

Pinned Loading

  1. fib_acc fib_acc Public

    A Fibonacci ASIC accelerator built using system verilog and open-source EDA tools.

    C++

  2. mat_mul_sys_arr mat_mul_sys_arr Public

    Implementation of Matrix Multiplication in hardware using a systolic architecture

    SystemVerilog

  3. 32bit-mult 32bit-mult Public

    32 bit multiplier in system verilog

    Verilog

  4. Vortex-ASIC Vortex-ASIC Public

    Taking a single Vortex core and L1 cache into an ASIC using open-source EDA tools.

    SystemVerilog

  5. legorockband/CSC426_SnakeGame legorockband/CSC426_SnakeGame Public

    SystemVerilog

  6. Space-Invaders-Arcade Space-Invaders-Arcade Public

    Space invaders project using a STM32L476RGT6 Nucleo Board. External peripherals include a joystick, Adafruit 1.9" Color IPS TFT Display, mechanical button, and a SP-1605 speaker.

    C