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Update for upstream riscv-isa-sim of the VexiiRiscv #10

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inochisa wants to merge 17 commits into
SpinalHDL:pmpfrom
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Update for upstream riscv-isa-sim of the VexiiRiscv #10
inochisa wants to merge 17 commits into
SpinalHDL:pmpfrom
project-inochi:upstream/vexiiriscv

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For SpinalHDL/VexiiRiscv#120

inochisa added 6 commits June 16, 2026 13:42
Signed-off-by: Inochi Amaoto <inochiama@gmail.com>
Signed-off-by: Inochi Amaoto <inochiama@gmail.com>
Signed-off-by: Inochi Amaoto <inochiama@gmail.com>
Signed-off-by: Inochi Amaoto <inochiama@gmail.com>
Signed-off-by: Inochi Amaoto <inochiama@gmail.com>
@inochisa

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Update log:

  1. Add TOPI/hpmcounter/tdata/tinfo/satp CSR check
  2. Add snapshot feature for debugging.
  3. Disable spike MMU asid support to match the VexiiRiscv state.

@inochisa inochisa force-pushed the upstream/vexiiriscv branch from 16f937f to 03b4559 Compare June 17, 2026 11:00
inochisa added 2 commits June 18, 2026 09:09
Signed-off-by: Inochi Amaoto <inochiama@gmail.com>
Signed-off-by: Inochi Amaoto <inochiama@gmail.com>
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