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Add support for STM32H5 devices with nucleo-h563zi board#3602

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kasjer:kasjer/stm32h5-support
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Add support for STM32H5 devices with nucleo-h563zi board#3602
kasjer wants to merge 10 commits intoapache:masterfrom
kasjer:kasjer/stm32h5-support

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@kasjer kasjer commented Apr 7, 2026

This adds initial support for STM32H563 device.

Example BSP is nucleo-h563zi board

@github-actions github-actions Bot added STM STM32 related BSP size/xl labels Apr 7, 2026
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sjanc commented Apr 23, 2026

looks ok, but please update rat and LICENSE

@kasjer kasjer force-pushed the kasjer/stm32h5-support branch from b6e3455 to 028a803 Compare April 24, 2026 07:57
@github-actions github-actions Bot added the USB All USB work should have this label label Apr 24, 2026
@kasjer kasjer changed the title Add support for STM32H5 devices with nucleo-h753zi board Add support for STM32H5 devices with nucleo-h563zi board Apr 24, 2026
@kasjer kasjer force-pushed the kasjer/stm32h5-support branch 6 times, most recently from 9e9ee18 to 76ecd82 Compare April 24, 2026 11:17
@kasjer kasjer added the skip-style-check Use for exceptional cases only label Apr 24, 2026
@kasjer kasjer force-pushed the kasjer/stm32h5-support branch 3 times, most recently from 07068c5 to 4da1db7 Compare April 27, 2026 06:56
kasjer added 6 commits May 6, 2026 13:09
Initial support for STM32H5 device family

Signed-off-by: Jerzy Kasenberg <jerzy.kasenberg@codecoup.pl>
Initial support for nucleo-h753zi

Signed-off-by: Jerzy Kasenberg <jerzy.kasenberg@codecoup.pl>
Signed-off-by: Jerzy Kasenberg <jerzy.kasenberg@codecoup.pl>
STM32H5 requires minor change to enable correct
clocks.

Signed-off-by: Jerzy Kasenberg <jerzy.kasenberg@codecoup.pl>
System Memory is not cacheable.
When access device ID system caches are
temporarily disabled.

Other option would be to configure MPU with
attributes OUTER_SHAREABLE, NO_CACHE, DEVICE_nGnRE

Signed-off-by: Jerzy Kasenberg <jerzy.kasenberg@codecoup.pl>
This adds functionality that aim to help
enabling peripheral clocks.

Signed-off-by: Jerzy Kasenberg <jerzy.kasenberg@codecoup.pl>
@kasjer kasjer force-pushed the kasjer/stm32h5-support branch from 4da1db7 to 941eb2f Compare May 6, 2026 11:09
kasjer added 4 commits May 6, 2026 13:29
STM32 GPIO pin functions now have configuration
that can be used.
If pin can be assigned for specific function
like SPI, code will provide apprpriate
value like
PA12_SPI2_SCK that can be used for pin configuration

Signed-off-by: Jerzy Kasenberg <jerzy.kasenberg@codecoup.pl>
Writes to STM32H5 flash require to have DCACHE disabled
due to some AHB access problems.

Additionally after last write code wait for program
operation to finish. Otherwise even though data is
written to flash for some time reads from this area
can show old data

Signed-off-by: Jerzy Kasenberg <jerzy.kasenberg@codecoup.pl>
Flash programming may require delay depending on
system clock frequency and VDD value

This adds syscfg value that can be configured.
It is set to maximum value by defaulut

Signed-off-by: Jerzy Kasenberg <jerzy.kasenberg@codecoup.pl>
Signed-off-by: Jerzy Kasenberg <jerzy.kasenberg@codecoup.pl>
@kasjer kasjer force-pushed the kasjer/stm32h5-support branch from 941eb2f to a9ea85a Compare May 6, 2026 11:30
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