[Deepin-Kernel-SIG] [linux 7.2.y] [deepin] phytium spi/hda/sound/qspi and gf audio support from v6.6 and bugfix

Documentation/devicetree/bindings/sound/phytium,hda.yaml

@@ -0,0 +1,45 @@
+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/sound/phytium,hda.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Phytium HD Audio controller
+
+maintainers:
+  - Chen Baozi <chenbaozi@phytium.com.cn>
+
+properties:
+  compatible:
+    const: phytium,hda
+
+  reg:
+    minItems: 1
+    description: address and length of the HDA controller registers
+
+  interrupts:
+    maxItems: 1
+    description: HDA controller interrupt
+
+  clocks:
+    maxItems: 1
+    description: clock phandle for the HDA controller
+
+required:
+  - compatible
+  - reg
+  - interrupts
+  - clocks
+
+unevaluatedProperties: false
+
+examples:
+  - |
+    #include <dt-bindings/interrupt-controller/arm-gic.h>
+
+    hda: hda@2800d000 {
+      compatible = "phytium,hda";
+      reg = <0x0 0x2800d000 0x0 0x1000>;
+      interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
+      clocks = <&sysclk_48mhz>;
+    };

Documentation/devicetree/bindings/spi/phytium,qspi-nor.yaml

@@ -0,0 +1,70 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/spi/phytium,qspi-nor.yaml#
+$schema: http://devicetree.org/schemas/meta-schemas/core.yaml#
+
+title: Phytium Quad Serial Peripheral Interface (QSPI) bindings
+
+maintainers:
+  - Chen Baozi <chenbaozi@phytium.com.cn>
+
+allOf:
+  - $ref: "spi-controller.yaml#"
+
+properties:
+  compatible:
+    const: phytium,qspi-nor
+
+  reg:
+    items:
+      - description: registers
+      - description: memory mapping region
+
+  reg-names:
+    items:
+      - const: qspi
+      - const: qspi_mm
+
+  clocks:
+    maxItems: 1
+
+  no-direct-mapping:
+    $ref: /schemas/types.yaml#/definitions/flag
+    description:
+      Indicates if we can use direct mapping to access the flash
+
+required:
+  - compatible
+  - reg
+  - reg-names
+  - clocks
+
+unevaluatedProperties: false
+
+examples:
+  - |
+    qspi: qspi@28014000 {
+      compatible = "phytium,qspi-nor";
+      reg = <0x0 0x28014000 0x0     0x1000>,
+            <0x0        0x0 0x0 0x02000000>;
+      reg-names = "qspi", "qspi_mm";
+      clocks = <&sysclk_600mhz>;
+
+      #address-cells = <1>;
+      #size-cells = <0>;
+
+      flash@0 {
+        compatible = "jedec,spi-nor";
+        reg = <0>;
+        spi-rx-bus-width = <4>;
+        spi-max-frequency = <600000000>;
+      };
+
+      flash@1 {
+        compatible = "jedec,spi-nor";
+        reg = <1>;
+        spi-rx-bus-width = <4>;
+        spi-max-frequency = <600000000>;
+      };
+    };

Documentation/devicetree/bindings/spi/phytium,spi.yaml

@@ -0,0 +1,106 @@
+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/spi/phytium,spi.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Phytium SPI controller
+
+maintainers:
+  - Chen Baozi <chenbaozi@phytium.com.cn>
+
+allOf:
+  - $ref: spi-controller.yaml#
+  - if:
+      properties:
+        compatible:
+          contains:
+            const: phytium,spi-2.0
+    then:
+      properties:
+        reg:
+          minItems: 2
+          maxItems: 2
+          description:
+            reg[0]: register file window;
+            reg[1]: AP-RV shared memory window
+      required:
+        - reg
+    else:
+      properties:
+        reg:
+          minItems: 1
+          maxItems: 1
+
+properties:
+  compatible:
+    oneOf:
+      - const: phytium,spi
+      - const: phytium,spi-2.0
+        description: Phytium SPI controller v2.0 interface
+
+  reg:
+    minItems: 1
+    description: address and length of the spi master registers
+
+  interrupts:
+    maxItems: 1
+    description: should contain one interrupt
+
+  clocks:
+    maxItems: 1
+    description: spi clock phandle
+
+  num-cs:
+    $ref: /schemas/types.yaml#/definitions/uint32
+    description: number of chip selects used
+    default: 4
+
+  reg-io-width:
+    $ref: /schemas/types.yaml#/definitions/uint32
+    enum: [ 4 ]
+    description: I/O register width in bytes
+    default: 4
+
+  global-cs:
+    $ref: /schemas/types.yaml#/definitions/uint32
+    enum: [ 0, 1 ]
+    description: |
+      When set to 1, the controller drives all chip selects through a
+      single global chip-select line (GCSR mode).
+    default: 1
+
+  dmas:
+    minItems: 2
+    maxItems: 2
+    description: TX and RX DMA channel specifiers
+
+  dma-names:
+    items:
+      - const: rx
+      - const: tx
+
+required:
+  - compatible
+  - "#address-cells"
+  - "#size-cells"
+  - reg
+  - interrupts
+  - clocks
+  - num-cs
+
+unevaluatedProperties: false
+
+examples:
+  - |
+    #include <dt-bindings/interrupt-controller/arm-gic.h>
+
+    spi0: spi@2800c000 {
+      compatible = "phytium,spi";
+      #address-cells = <1>;
+      #size-cells = <0>;
+      interrupts = <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>;
+      reg = <0x0 0x2800c000 0x0 0x1000>;
+      clocks = <&sysclk_48mhz>;
+      num-cs = <4>;
+    };

drivers/firmware/arm_scmi/transports/mailbox.c

@@ -241,6 +241,30 @@ static int mailbox_chan_setup(struct scmi_chan_info *cinfo, struct device *dev,
 		}
 	}
 
+	/*
+	 * The Phytium mailbox controller never raises the transfer-complete
+	 * interrupt, so synchronous commands must be polled. Inspect the
+	 * controller behind the a2p reply mailbox; a phandle that cannot be
+	 * resolved is not fatal - just skip the quirk then.
+	 */
+	if (tx) {
+		struct of_phandle_args args;
+
+		/*
+		 * mboxes is a phandle-with-args list; of_parse_phandle()
+		 * does not account for #mbox-cells, so it can land on an
+		 * argument cell instead of the controller node when the
+		 * specifier has arguments. Use the full parser.
+		 */
+		if (!of_parse_phandle_with_args(cdev->of_node, "mboxes",
+						"#mbox-cells", a2p_rx_chan,
+						&args)) {
+			if (of_device_is_compatible(args.np, "phytium,mbox"))
+				cinfo->no_completion_irq = true;
+			of_node_put(args.np);
+		}
+	}
+
 	cinfo->transport_info = smbox;
 	smbox->cinfo = cinfo;
 	mutex_init(&smbox->chan_lock);

drivers/mtd/mtdpart.c

@@ -20,6 +20,8 @@
 #include <linux/of_platform.h>
 #include <linux/mtd/concat.h>
 
+#include <linux/acpi.h>
+#include <linux/property.h>
 #include "mtdcore.h"
 
 /*
@@ -90,6 +92,7 @@ static struct mtd_info *allocate_partition(struct mtd_info *parent,
 	child->dev.parent = IS_ENABLED(CONFIG_MTD_PARTITIONED_MASTER) || mtd_is_partition(parent) ?
 			    &parent->dev : parent->dev.parent;
 	child->dev.of_node = part->of_node;
+	child->dev.fwnode = part->fwnode;
 	child->parent = parent;
 	child->part.offset = part->offset;
 	INIT_LIST_HEAD(&child->partitions);
@@ -525,12 +528,14 @@ EXPORT_SYMBOL_GPL(deregister_mtd_parser);
 static const char * const default_mtd_part_types[] = {
 	"cmdlinepart",
 	"ofpart",
+	"acpipart",
 	NULL
 };
 
 /* Check DT only when looking for subpartitions. */
 static const char * const default_subpartition_types[] = {
 	"ofpart",
+	"acpipart",
 	NULL
 };
 
@@ -594,6 +599,39 @@ static struct mtd_part_parser *mtd_part_get_compatible_parser(const char *compat
 	return ret;
 }
 
+static int mtd_part_acpi_parse(struct mtd_info *master,
+						struct mtd_partitions *pparts)
+{
+	struct mtd_part_parser *parser;
+	const char *compat = NULL;
+	const char *fixed = "acpi-fixed-partitions";
+	int ret, err = 0;
+	struct device *dev = &master->dev;
+
+	/*
+	 * Only the master carries the "fixed" marker property; on
+	 * subpartitions it is absent and no ACPI parsing is done.
+	 */
+	if (!mtd_is_partition(master))
+		fwnode_property_read_string(dev->fwnode, "fixed", &compat);
+
+	if (compat && !strcmp(compat, fixed)) {
+		parser = mtd_part_parser_get(fixed);
+		if (!parser && !request_module("%s", fixed))
+			parser = mtd_part_parser_get(fixed);
+		if (parser) {
+			ret = mtd_part_do_parse(parser, master, pparts, NULL);
+			if (ret > 0)
+				return ret;
+			mtd_part_parser_put(parser);
+			if (ret < 0 && !err)
+				err = ret;
+		}
+	}
+
+	return err;
+}
+
 static int mtd_part_of_parse(struct mtd_info *master,
 			     struct mtd_partitions *pparts)
 {
@@ -699,7 +737,9 @@ int parse_mtd_partitions(struct mtd_info *master, const char *const *types,
 		 * should be used. It requires a bit different logic so it is
 		 * handled in a separated function.
 		 */
-		if (!strcmp(*types, "ofpart")) {
+		if (!strcmp(*types, "acpipart")) {
+			ret = mtd_part_acpi_parse(master, &pparts);
+		} else if (!strcmp(*types, "ofpart")) {
 			ret = mtd_part_of_parse(master, &pparts);
 		} else {
 			pr_debug("%s: parsing partitions %s\n", master->name,

drivers/mtd/parsers/Kconfig

@@ -91,6 +91,14 @@ config MTD_OF_PARTS_LINKSYS_NS
 	  two "firmware" partitions. Currently used firmware has to be detected
 	  using CFE environment variable.
 
+config MTD_ACPI_PARTS
+	tristate "ACPI partitioning parser"
+	depends on ACPI && (ARCH_PHYTIUM || COMPILE_TEST)
+	help
+	  This provides an acpi partition parser, which is used to parse the
+	  partition map described in ACPI table, as the children of the flash
+	  memory struct.
+
 config MTD_PARSER_IMAGETAG
 	tristate "Parser for BCM963XX Image Tag format partitions"
 	depends on BCM63XX || BMIPS_GENERIC || COMPILE_TEST

drivers/mtd/parsers/Makefile

@@ -7,6 +7,8 @@ obj-$(CONFIG_MTD_OF_PARTS)		+= ofpart.o
 ofpart-y				+= ofpart_core.o
 ofpart-$(CONFIG_MTD_OF_PARTS_BCM4908)	+= ofpart_bcm4908.o
 ofpart-$(CONFIG_MTD_OF_PARTS_LINKSYS_NS)+= ofpart_linksys_ns.o
+obj-$(CONFIG_MTD_ACPI_PARTS)		+= acpipart.o
+acpipart-y				+= acpipart_core.o
 obj-$(CONFIG_MTD_PARSER_IMAGETAG)	+= parser_imagetag.o
 obj-$(CONFIG_MTD_AFS_PARTS)		+= afs.o
 obj-$(CONFIG_MTD_PARSER_TPLINK_SAFELOADER)	+= tplink_safeloader.o