Skip fp16-config tests on accelerators without fp16 support

[delock]

Description

Every fp16-config test that reaches deepspeed.initialize crashes its sanity check (Type fp16 is not supported on your device.) on accelerators whose is_fp16_supported() is false. On CPU that maps to the AVX512-FP16 capability of the host, and GitHub's ubuntu-24.04 runners are hardware-heterogeneous, so these tests flip between failure and skip depending on which runner they land on. #8398 added the first skipifs; the multi-rank CPU run in #8381 flushed out six more files:

File	Shape of the gap
checkpoint/test_universal_checkpoint.py	fp16 parametrizations fail inside the baseline DistributedFixture's distributed run — pytest reports a setup ERROR for every dependent test (48 on the multi-rank run) instead of a skip
v1/zero/test_zero_coalesce_grad_reduction.py	TestCoalesceFP16 forces an fp16 config
runtime/test_no_sync_ctxt.py	dtype=float16 parametrizations of three methods; stages 2/3 additionally never reach their expected no_sync AssertionError on such hosts
checkpoint/test_moe_checkpoint.py	whole class hardcodes fp16
runtime/zero/test_zero_offloadpp.py	TestZeroPartialOffloadConfigSweep hardcodes fp16
checkpoint/test_pipeline.py	fp16 enabled for zero_stage > 0; only that parametrization skips, zero_stage=0 keeps running

With this PR, every fp16-config test in the suite guards on is_fp16_supported() — the capability gap is a skip, not a failure, on any accelerator.

Validation (executed on real hardware)

• 20-core x86_64 CPU without AVX512-FP16, gloo, 2-4 ranks (LOCAL_SIZE=2/4)
• Before: 18 failures + 48 setup ERRORs across these files on the multi-rank CPU run
• After: every affected parametrization skips; adjacent non-fp16 parametrizations keep passing (e.g. pipeline zero_stage=0 runs to completion)
• Full-suite evidence in [DON'T MERGE] Run multi-rank CPU unit tests in CI via LOCAL_SIZE #8381: the multi-rank CPU run went 8 failures -> 0 with these guards

Sibling PRs from the same series: #8397, #8398, #8399, #8407, #8409, #8559, #8648.

[hwchen2017]

Should we have a check for bf16 here as well?

[delock]

Thanks for the comments. Currently CPU with accelerated instruction set (AVX or AMX) has BF16 support. We can add bf16 skip check when we need to run validation on accelerators without bf16 support.