[ROCm] Add HIP/ROCm support for AMD GPUs - #3
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This adds a HIP/ROCm build path so cuda-efficient-features runs on AMD GPUs, alongside the existing CUDA build. It is opt-in via -DUSE_HIP=ON; the default build (USE_HIP=OFF) is unchanged and still uses CUDA and the OpenCV CUDA module. To review: a cuda_to_hip.h compatibility header maps the CUDA API symbols the .cu sources use to HIP, so the kernels compile under hipcc unchanged. Because the OpenCV CUDA module is not available on ROCm, the HIP build instead uses a small HIP-native GpuMat (in hip_compat/) and HIP kernels for the OpenCV CUDA operations the code relied on (Gaussian blur, resize, integral image); these are all behind USE_HIP, so the CUDA path keeps using OpenCV's GpuMat. cuBLAS maps to hipBLAS through a thin abstraction. The one change shared by both backends is wave-size correctness in the descriptor kernels: the warp shuffles are moved outside the keypoint-bounds conditional so every lane in the wave participates (a wave64 device deadlocks if some lanes exit first), with out-of-range lanes guarded from reading/writing keypoint memory and contributing zero to the reduction. FULL_WARP_MASK is 64-bit on HIP and the original 0xffffffff on CUDA, so the CUDA result is unchanged. This work was authored with the assistance of Claude, an AI assistant by Anthropic. Test Plan: Built with -DUSE_HIP=ON and ran the project's test suite on AMD GPUs: - gfx90a (CDNA2, wave64) and gfx1100 (RDNA3, wave32): Linux, ROCm 7.2.1 - gfx1201 (RDNA4, wave32): Windows, ROCm 7.14 ``` cmake -B build -DUSE_HIP=ON -DCMAKE_HIP_ARCHITECTURES=gfx90a -DBUILD_TESTS=ON cmake --build build ``` All tests pass. The default CUDA build (USE_HIP=OFF) is unaffected by this change.
The documented HIP/ROCm build invokes find_package(hip)/find_package(hipblas) but omitted -DCMAKE_PREFIX_PATH, so on a clean ROCm container where ROCm is not on PATH (e.g. /opt/rocm/bin not exported), CMake configuration fails with hip_DIR-NOTFOUND because it cannot locate the hip* package config files. Setting the ROCM_PATH environment variable or pointing CMAKE_HIP_COMPILER at the absolute clang++ path does not fix this; only adding the ROCm install prefix to CMAKE_PREFIX_PATH (or putting /opt/rocm/bin on PATH) lets find_package resolve the hip* packages. Add the flag to the example and note the PATH alternative. Authored with the assistance of an AI coding agent.
The gfx90a pin sat after project(LANGUAGES ... HIP), which already enables the HIP language and detects the host arch (or errors). Its if(NOT DEFINED CMAKE_HIP_ARCHITECTURES) guard was therefore always false and the block dead. Removing it makes intent clear and keeps the build honoring -DCMAKE_HIP_ARCHITECTURES, auto-detecting the host GPU, or erroring on a no-GPU host, rather than risking a silently wrong gfx90a default if file order ever changed. This change was authored with the assistance of the Claude AI assistant.
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Summary
This adds a HIP/ROCm build path so cuda-efficient-features runs on AMD GPUs, alongside the existing CUDA build. It is opt-in via
-DUSE_HIP=ON; the default build (USE_HIP=OFF) is unchanged and still uses CUDA and the OpenCV CUDA module.A
cuda_to_hip.hcompatibility header maps the CUDA API symbols the.cusources use to HIP, so the kernels compile under hipcc unchanged. Because the OpenCV CUDA module is not available on ROCm, the HIP build instead uses a small HIP-nativeGpuMat(inhip_compat/) and HIP kernels for the OpenCV CUDA operations the code relied on (Gaussian blur, resize, integral image); these are all behindUSE_HIP, so the CUDA path keeps using OpenCV'sGpuMat. cuBLAS maps to hipBLAS through a thin abstraction.The one change shared by both backends is wave-size correctness in the descriptor kernels: the warp shuffles are moved outside the keypoint-bounds conditional so every lane in the wave participates (a wave64 device deadlocks if some lanes exit first), with out-of-range lanes guarded from reading/writing keypoint memory and contributing zero to the reduction.
FULL_WARP_MASKis 64-bit on HIP and the original0xffffffffon CUDA, so the CUDA result is unchanged.Test Plan
Built with
-DUSE_HIP=ONand ran the project's test suite (22 BAD + 22 HashSIFT descriptor cases) on three AMD architectures, all passing:The wave-size fix is confirmed on both wave64 (gfx90a) and wave32 (RDNA) hardware. The default CUDA build (
USE_HIP=OFF) is unaffected.This work was authored with the assistance of Claude, an AI assistant by Anthropic.