feat(mega): add fused shared side-LoRA kernels - #9
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Risk: high. Not approving: Cursor Bugbot finished skipped/neutral with 2 unresolved high-severity findings (undersized MXFP4 ready buffer; unsafe down-unweighted scratch reuse), and this ~16k-line fused side-LoRA CUDA change exceeds the low-risk auto-approval threshold. Human review is required for the MXFP4 buffer contract and backward scratch aliasing.
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Risk: high. Not approving: Cursor Bugbot completed skipped/neutral with 2 unresolved high-severity findings (undersized MXFP4 ready buffer; unsafe down-unweighted scratch reuse), and this ~16k-line fused side-LoRA CUDA change exceeds the low-risk auto-approval threshold. Human review is required; existing reviewer requests were left in place.
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Risk: high. Not approving: Cursor Bugbot passed with prior findings resolved and Security Agent was not running, but this large fused side-LoRA CUDA training change exceeds the low-risk auto-approval threshold. Human review is required; existing reviewer requests were left in place.
Sent by Cursor Approval Agent: Pull Request Approver



Summary
BLOCK_M=8, and require the MXFP4 saved-down scratch to cover the full rank-uniform pool before any prelude/kernel launchCorrectness coverage
The numerical harness checks BF16 and MXFP4 forward/backward against PyTorch references and independently checks adapter contractions at the exact saved native boundaries. Coverage includes EP1/EP2/EP4, masked and remote routes, empty experts, top-k 1/2/6, SwiGLU/GeGLU, activation clamping, zero adapter scale, reusable outputs, source-combined grad-x/router gradients, and sparse rank-uniform route pools.
The exact DSV4 Flash EP4 production-width sweep uses H=4096, I=2048, 256 experts, top-k 6, remote routing, and 20% masked routes. Both BF16 and MXFP4 pass all 15 token counts per rank:
1, 15, 16, 17, 90, 91, 176, 177, 346, 347, 688, 689, 1029, 1030, 2048These straddle every BLOCK_M scheduler transition. The original sparse failures at 1 and 15-17 tokens are fixed.
At the exact 262,144-token EP4 FireTitan control shape:
All fused tensors are finite. The current trunk control emitted nonfinite shared-factor gradients in this production comparison (A1/B2 for BF16 and A1/A3 for MXFP4), so this PR does not manufacture a shared-gradient cosine against that invalid control; the independent native-boundary checks above cover the fused contractions directly.
Performance
B300 exact DSV4 Flash shape: EP4, 65,536 tokens/rank, 262,144 total, H=4096, I=2048, 256 experts, top-k 6. The control and candidate are both side-LoRA, and shared-factor EP reductions are included. Warmup 2, five measured iterations, maximum-rank CUDA latency.
The production-relevant F+B comparison applies the identical non-reentrant whole-MoE activation-checkpoint wrapper to the latest-trunk control and the fused FireTitan custom-autograd integration:
Under the matched checkpointed contract, native MXFP4 is 2.47% faster than BF16 compute on the trunk control and 4.16% faster on the fused path. The non-checkpointed custom-autograd diagnostic is 84.09 ms BF16 and 87.49 ms MXFP4: with only one forward charged, MXFP4's backward dequantization cost outweighs its forward saving. That diagnostic is not used as the production headline. The separate original-MegaMoE/full-base-wgrad comparison is also diagnostic only and is not used for these speedups.
Tests
python tests/run_mega_moe_side_lora_edge_matrix.py --ep-processes 2Private trainer integration and trainer-dependent E2E benchmark sources remain outside this public repository PR.