[PW_SID:1160575] net: stmmac: qcom-ethqos: add support for SCMI power domains - #2622
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aqr_gen1_read_status() decodes the MDIO_PHYXS_VEND_IF_STATUS register to determine which SerDes interface the PHY is currently using on its system side and stores the result in phydev->interface. phylink relies on this value to configure the MAC. The autoneg == AUTONEG_DISABLE check is not correct: MDIO_PHYXS_VEND_IF_STATUS is set by the PHY firmware based on the negotiated link speed, not based on whether autoneg was used to reach it. When the link comes up at 1G in forced mode, the register correctly reads SGMII, but the early return prevents phydev->interface from being updated. It stays at whatever value it held before (typically 2500BASE-X from the initial autoneg run), so phylink configures the MAC for the wrong interface and the link cannot come up. Remove the autoneg guard so that the system interface type is always decoded when the link is up. Cc: stable@vger.kernel.org Fixes: 110a243 ("net: phy: aquantia: add downshift support") Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@oss.qualcomm.com> Signed-off-by: Linux RISC-V bot <linux.riscv.bot@gmail.com>
Describe the SGMII/SerDes PHY present on the Qualcomm sa8255p platforms. This is essentially the same hardware as sa8775p rev3 but the PHY is managed by firmware over SCMI. Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@oss.qualcomm.com> Signed-off-by: Linux RISC-V bot <linux.riscv.bot@gmail.com>
Implement support for the firmware-managed SGMII/SerDes PHY present on Qualcomm platforms. Do this as a separate driver from the HLOS-managed variant as they don't share almost any code. Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@oss.qualcomm.com> Signed-off-by: Linux RISC-V bot <linux.riscv.bot@gmail.com>
…tems Describe the firmware-managed variant of the QCom DesignWare MAC. As the properties here differ a lot from the HLOS-managed variant, lets put it in a separate file. Since we need to update the maximum number of power domains, let's update existing bindings referencing the top-level snps,dwmac.yaml and limit their maxItems for power-domains to 1. Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org> Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Reviewed-by: Romain Gantois <romain.gantois@bootlin.com> # For RZ/N1 Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@oss.qualcomm.com> Signed-off-by: Linux RISC-V bot <linux.riscv.bot@gmail.com>
Call phy_set_mode_ext() before phy_power_on() in qcom_ethqos_serdes_powerup(). This is harmless for existing users but on SCMI systems this is required for the PHY driver to select the right performance level - which translates to the link speed. This is done ahead of adding support for the firmware-managed EMAC on Qualcomm sa8255p. Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@oss.qualcomm.com> Signed-off-by: Linux RISC-V bot <linux.riscv.bot@gmail.com>
…n mac_finish() ethqos->phy_mode is read by serdes_powerup() and qcom_ethqos_set_sgmii_loopback() to configure the SerDes and its wrapper for the correct interface. It is set once at probe from the DT phy-mode property and never updated. phylink resolves the actual runtime interface and passes it to the mac_finish() callback. On platforms that only ever operate at one speed these two values are always the same, but when the interface changes at runtime - for example switching between SGMII and 2500BASE-X — the stored value becomes stale. The next serdes_powerup() call, on a subsequent link cycle, then reinitialises the SerDes to the wrong mode. Update ethqos->phy_mode from the interface argument in ethqos_mac_finish_serdes() so that it always reflects the last resolved interface. Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@oss.qualcomm.com> Signed-off-by: Linux RISC-V bot <linux.riscv.bot@gmail.com>
…speed change The loopback in the MAC wrapper feeds the TX clock back into the RX path, while the SerDes is being powered up. Without it, dwmac4_dma_reset() polls a clock that never toggles and times out. qcom_ethqos_set_sgmii_loopback() gates this on phy_mode being 2500BASEX. mac_finish() now updates phy_mode to the runtime-resolved interface, any subsequent resume with a 1G SGMII link skips the loopback setup and the DMA reset hangs. Extend the guard to include PHY_INTERFACE_MODE_SGMII. Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@oss.qualcomm.com> Signed-off-by: Linux RISC-V bot <linux.riscv.bot@gmail.com>
Instead of needlessly copying the fields of ethqos_emac_driver_data into struct qcom_ethqos, just use the address of the former as a reference. It's .rodata after all. This is done in order to avoid having either two calls to of_device_get_match_data() or having to extend the latter with another field when adding support for SCMI. Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@oss.qualcomm.com> Signed-off-by: Linux RISC-V bot <linux.riscv.bot@gmail.com>
…e function Ahead of adding support for firmware-controlled EMAC variants, extend the ethqos_emac_driver_data structure with a setup() callback, implement it for the existing models and move all operations not required in SCMI mode into it. Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@oss.qualcomm.com> Signed-off-by: Linux RISC-V bot <linux.riscv.bot@gmail.com>
Extend the driver to support a new model - sa8255p. Unlike the previously supported variants, this one's power management is done in the firmware over SCMI. This is modeled in linux using power domains so add a new emac data variant and a separate setup callback. Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@oss.qualcomm.com> Signed-off-by: Linux RISC-V bot <linux.riscv.bot@gmail.com>
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PR for series 1160575 applied to workflow__riscv__fixes
Name: net: stmmac: qcom-ethqos: add support for SCMI power domains
URL: https://patchwork.kernel.org/series/1160575/
Version: 14