plan(REQ-PIX-009): gale-nano challenge (gale#65) — maximal-wasm bare-metal OS for the I/O MCU#44
Merged
Merged
Conversation
… bare-metal OS for the I/O MCU For the STM32F100 I/O MCU (M3, 8KB SRAM) where full Zephyr doesn't fit: a minimal verified gale subset + the kiln async scheduler, built the SAME maximal-wasm way (DD-006) — fused+loom-optimized+synth-compiled to wasm, only bare-minimum registers/MMIO native. Constraints (8KB SRAM, failsafe role, CCSDS+relay-sec over LPUART) + the de-risking Renode info (STM32F1/stm32f103.repl IS modeled, unlike RT1176) in gale#65. REQ-PIX-009 / supervising gale#65. rivet validate: PASS. Co-Authored-By: Claude Opus 4.8 <noreply@anthropic.com>
This file contains hidden or bidirectional Unicode text that may be interpreted or compiled differently than what appears below. To review, open the file in an editor that reveals hidden Unicode characters.
Learn more about bidirectional Unicode characters
Sign up for free
to join this conversation on GitHub.
Already have an account?
Sign in to comment
1 participant
Add this suggestion to a batch that can be applied as a single commit.This suggestion is invalid because no changes were made to the code.Suggestions cannot be applied while the pull request is closed.Suggestions cannot be applied while viewing a subset of changes.Only one suggestion per line can be applied in a batch.Add this suggestion to a batch that can be applied as a single commit.Applying suggestions on deleted lines is not supported.You must change the existing code in this line in order to create a valid suggestion.Outdated suggestions cannot be applied.This suggestion has been applied or marked resolved.Suggestions cannot be applied from pending reviews.Suggestions cannot be applied on multi-line comments.Suggestions cannot be applied while the pull request is queued to merge.Suggestion cannot be applied right now. Please check back later.
Filed gale#65: a maximal-wasm gale-nano for tiny bare-metal nodes (STM32F100 I/O MCU, M3/8KB SRAM) — a few verified gale primitives + the kiln async scheduler, built the same way as everything else (DD-006): fused → loom → synth to wasm, only bare-minimum registers native. Includes the outside parameters (8KB SRAM, px4io failsafe role, CCSDS+relay-sec over LPUART) and the de-risking Renode info (Renode does model STM32F1/
stm32f103.repl, unlike the RT1176 — AFD-018). Tracked as REQ-PIX-009.rivet validate: PASS.🤖 Generated with Claude Code