test carryless_mul codegen#157831
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Is it OK to add tests that only test the next LLVM? Otherwise this can be put on ice for a couple of weeks. r? nikic |
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Some changes occurred in src/tools/compiletest cc @jieyouxu
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Is it OK to add tests that only test the next LLVM? Otherwise this can be put on ice for a couple of weeks.
Yes, that's fine.
It's a bit unfortunate that this test depends on target availability. I guess making this a minicore test by directly calling the intrinsic is bad practice?
| fn carryless_mul_u64(a: u64, b: u64) -> u64 { | ||
| // CHECK-LABEL: carryless_mul_u64: | ||
| // x86_64: pclmulqdq | ||
| // aarch64: pmull v0.1q, v1.1d, v0.1d |
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The register matching here looks fragile? Like this one uses v1.1d, v0.1d, while the others are v0.1d, v1.1d. That seems like something that can easily flip.
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| fn carryless_mul_u64(a: u64, b: u64) -> u64 { | ||
| // CHECK-LABEL: carryless_mul_u64: | ||
| // x86_64: pclmulqdq | ||
| // aarch64: pmull v0.1q, v1.1d, v0.1d |
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@bors r+ rollup |
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Rollup of 6 pull requests Successful merges: - #157707 (Introduce `-Z lint-rust-version`) - #157748 (rustc_public: make sure hidden fields have their accessors) - #157831 (test `carryless_mul` codegen) - #157879 (bootstrap: fix inverted success check in PowerShell download fallback) - #157933 (Use constant for detecting thin pointer formatting) - #157934 (update AttributeTemplate docs)
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Rollup merge of #157831 - folkertdev:carryless-mul-test, r=nikic test `carryless_mul` codegen tracking issue: #152080 Test the codegen of `carryless_mul` with LLVM 23, which has custom lowerings for x86_64, aarch64 and riscv64. - Rust to LLVM IR: https://godbolt.org/z/sM914e4fo - LLVM IR to assembly: https://godbolt.org/z/5Y7naa4cY You can also see that the default expansion (when there is no special intruction available) is quite large still... - manual https://godbolt.org/z/hbEe3WMdW (based on #152132 (comment)) - LLVM https://godbolt.org/z/577Wb9E99 So LLVM default over 3X the number of instructions for the 64-bit and 128-bit case.
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tracking issue: #152080
Test the codegen of
carryless_mulwith LLVM 23, which has custom lowerings for x86_64, aarch64 and riscv64.You can also see that the default expansion (when there is no special intruction available) is quite large still...
carryless_mul#152132 (comment))So LLVM default over 3X the number of instructions for the 64-bit and 128-bit case.