RTL conventions: mirrored include↔rtl↔tb tree, interface taxonomy, ordered filelists, enforced lint (additive) - #1
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Borrow + trim the four RTL-org conventions from the peer teaching-tapeout repo
Purdue-SoCET/atalla to make Lambda legible for the incoming cohort. ADDITIVE
ONLY — no existing block is reorganized; conventions apply to NEW modules and
are the migration target for the proven, timing-closed blocks.
What lands:
- docs/rtl_conventions.md — canonical write-up of all four conventions:
(1) mirrored include<->rtl<->tb trees sharing a per-module subpath, so ONE
generic target (make {lint,test} MOD=<mod>) builds any module by name;
(2) SV interface taxonomy: <mod>_if.sv + shared <block>_pkg + <mod>_params.svh,
modport <a>_<b> named for the two modules it connects;
(3) one ordered per-top .f consumed by BOTH sim and LibreLane;
(4) SHALL/SHOULD/MAY style guide, ENFORCED by a Verilator lint gate.
- docs/rtl_conventions_template/ — runnable worked example (regadd, a registered
adder) in the mirrored layout, with _if/_pkg/_params, ordered .f, cocotb test,
and a generic Makefile. `make test MOD=regadd` PASSES under iverilog 12 +
cocotb 2.0.1 (4 seeds, bit-exact vs a Python golden). Documents the Icarus-12
caveat honestly: it can't elaborate interface/modport PORTS, so the leaf keeps
flat ports and the interface is the harness fabric (Verilator/LibreLane accept
modport ports).
- scripts/check_block_structure.py — opt-in --check-rtl-conventions advisory scan
(ADVISE level NEVER gates, even under --strict, so it can't fail a not-yet-
migrated block); --strict-rtl-conventions promotes to WARN for future use.
- .github/workflows/rtl-lint.yml — Verilator --lint-only gate over every per-top
.f. Ships SOFT (continue-on-error + LINT_BLOCKING=0) so it can't red-wall the
existing blocks; header documents how to flip it blocking.
- DECISIONS.md — convention-adoption line (what/why/2026-08-01).
Migrating existing blocks to the mirrored tree is proposed but deliberately NOT
done here (disruptive; separate per-block sign-off).
Co-Authored-By: Claude Opus 4.8 <noreply@anthropic.com>
Claude-Session: https://claude.ai/code/session_01TQ7aDtFfmKVv2eK575vF3X
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Adopt four RTL-organization conventions (borrowed from Purdue-SoCET/atalla, adapted to our monorepo + golden-model discipline) to make the codebase legible for a large incoming new-member cohort. Fully additive — no existing block file was moved, renamed, or edited. Nothing here touches the timing-closed RTL.
What's here
docs/rtl_conventions.md— canonical write-up of all four conventions (deep on the mirrored tree: the shared-subpath layout, generic Make mechanics, the_if/_pkg/_paramstaxonomy +modport a_brule, one-.f-for-sim-and-harden, and a SHALL/SHOULD/MAY style guide).docs/rtl_conventions_template/— a runnable worked example (regadd) in the mirroredinclude/ rtl/ tb/layout with a genericmake lint/test MOD=…. Verified:make test MOD=regaddPASSes (4 seeds, bit-exact vs a Python golden, iverilog 12 + cocotb 2.0.1).scripts/check_block_structure.py— opt-in advisory--check-rtl-conventionsscan (newADVISElevel that never gates, even under--strict); default behavior unchanged, existing blocks won't fail..github/workflows/rtl-lint.yml— Verilator--lint-onlygate, non-blocking initially (continue-on-error,LINT_BLOCKING=0) so it can't red-wall proven blocks; documented switch to make it blocking once RTL is lint-clean.DECISIONS.md— adoption line (2026-08-01).The four conventions
include ↔ rtl ↔ tbsubpath tree + genericmake test MOD=…targets.<mod>_if.sv/<block>_pkg.svh/<mod>_params.svh, ifndef guards,modport a_bnaming..ffilelists consumed by both iverilog and LibreLane.Honest caveats
_ifas harness fabric; the_if/modporttaxonomy ships as the reviewed contract (Verilator/LibreLane accept modport ports).Deliberately NOT done (follow-ups)
Companion to the
lambda-onboardingwiki, which documents these same conventions for new members.🤖 Generated with Claude Code